Re: [PATCH V2] target/riscv: Align the data type of reset vector address

2021-03-25 Thread Dylan Jhong
Hi All, Please ignore this patch. There is a compile error while building 32bit qemu. The error occurs in ./target/riscv/cpu.c:557 "DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC)" It should be written differently according to 32bit or 64bit machine. I'll send

[PATCH V2] target/riscv: Align the data type of reset vector address

2021-03-24 Thread Dylan Jhong
Signed-off-by: Dylan Jhong Signed-off-by: Ruinland ChuanTzu Tsai --- target/riscv/cpu.c | 2 +- target/riscv/cpu.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7d6ed80f6b..4ac901245a 100644 --- a/target/riscv/cpu.c +++