orn.de; Zhangxiaofeng
> (F) ; alistair.fran...@wdc.com; yinyipeng
> ; pal...@dabbelt.com; Wubin (H)
> ; dengkai (A)
> Subject: Re: [PATCH V2] target/riscv: raise exception to HS-mode at
> get_physical_address
>
> On 10/9/20 2:57 AM, Yifei Jiang wrote:
> > #define T
On 10/9/20 2:57 AM, Yifei Jiang wrote:
> #define TRANSLATE_FAIL 1
> #define TRANSLATE_SUCCESS 0
> #define MMU_USER_IDX 3
> +#define TRANSLATE_G_STAGE_FAIL 4
Note that you're interleaving TRANSLATE_* around an unrelated define. Perhaps
rearrange to
enum {
TRANSLATE_SUCCESS = 0,
TRANSLA
VS-stage translation at get_physical_address needs to translate pte
address by G-stage translation. But the G-stage translation error
can not be distinguished from VS-stage translation error in
riscv_cpu_tlb_fill. On migration, destination needs to rebuild pte,
and this G-stage translation error mu
