On Fri, Jan 31, 2020 at 9:31 AM Alistair Francis wrote:
>
> On Thu, Jan 30, 2020 at 6:48 AM Palmer Dabbelt
> wrote:
> >
> > On Tue, 21 Jan 2020 11:02:01 GMT (+), alistai...@gmail.com wrote:
> > > On Wed, Jan 8, 2020 at 11:30 AM Palmer Dabbelt
> > > wrote:
> > >>
> > >> On Mon, 09 Dec 2019
On Thu, Jan 30, 2020 at 6:48 AM Palmer Dabbelt wrote:
>
> On Tue, 21 Jan 2020 11:02:01 GMT (+), alistai...@gmail.com wrote:
> > On Wed, Jan 8, 2020 at 11:30 AM Palmer Dabbelt
> > wrote:
> >>
> >> On Mon, 09 Dec 2019 10:11:19 PST (-0800), Alistair Francis wrote:
> >> > To handle the new
On Tue, 21 Jan 2020 11:02:01 GMT (+), alistai...@gmail.com wrote:
On Wed, Jan 8, 2020 at 11:30 AM Palmer Dabbelt wrote:
On Mon, 09 Dec 2019 10:11:19 PST (-0800), Alistair Francis wrote:
> To handle the new Hypervisor CSR register aliasing let's use pointers.
For some reason I thought we
>
> I was trying to avoid forcing everyone to understand the Hypervisor
> extension to develop for RISC-V.
I agree a full understanding of the hypervisor extension shouldn't be
required. But if code is going to be dealing with supervisor mode
registers, then whether the machine is in HS or VS
On Tue, Jan 21, 2020 at 10:56 PM Jonathan Behrens wrote:
>
> When I looked through the relevant code a few months ago, I couldn't find
> anywhere that could actually be agnostic to whether the real or virtual
> registers were in effect (other than emulating the actual CSR modification
>
When I looked through the relevant code a few months ago, I couldn't find
anywhere that could actually be agnostic to whether the real or virtual
registers were in effect (other than emulating the actual CSR modification
instructions). For almost all state, the VS behavior is filtered by HS-mode
On Wed, Jan 8, 2020 at 11:30 AM Palmer Dabbelt wrote:
>
> On Mon, 09 Dec 2019 10:11:19 PST (-0800), Alistair Francis wrote:
> > To handle the new Hypervisor CSR register aliasing let's use pointers.
>
> For some reason I thought we were making this explicit? In other words,
> requiring that all
On Mon, 09 Dec 2019 10:11:19 PST (-0800), Alistair Francis wrote:
To handle the new Hypervisor CSR register aliasing let's use pointers.
For some reason I thought we were making this explicit? In other words,
requiring that all callers provide which privilege mode they're using when
accessing
To handle the new Hypervisor CSR register aliasing let's use pointers.
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c| 11 +--
target/riscv/cpu.h| 9 -
target/riscv/cpu_helper.c | 30 +++---
target/riscv/csr.c| 20
