Re: [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence

2021-01-24 Thread Philippe Mathieu-Daudé
On 1/23/21 11:39 AM, Bin Meng wrote: > From: Bin Meng > > Per the "Physical Layer Specification Version 8.00" chapter 7.5.1, > "Command/Response", there is a minimum 8 clock cycles (Ncr) before > the card response shows up on the data out line. However current > implementation jumps directly to t

[PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence

2021-01-23 Thread Bin Meng
From: Bin Meng Per the "Physical Layer Specification Version 8.00" chapter 7.5.1, "Command/Response", there is a minimum 8 clock cycles (Ncr) before the card response shows up on the data out line. However current implementation jumps directly to the sending response state after all 6 bytes comma