On Fri, Sep 27, 2019 at 12:57 AM Bin Meng wrote:
>
> On Fri, Sep 27, 2019 at 8:52 AM Alistair Francis
> wrote:
> >
> > On reset only a single L2 cache way is enabled, the others are exposed
> > as memory that can be used by early boot firmware. This L2 region is
> > generally disabled using the
On Fri, Sep 27, 2019 at 8:52 AM Alistair Francis
wrote:
>
> On reset only a single L2 cache way is enabled, the others are exposed
> as memory that can be used by early boot firmware. This L2 region is
> generally disabled using the WayEnable register at a later stage in the
> boot process. To
On reset only a single L2 cache way is enabled, the others are exposed
as memory that can be used by early boot firmware. This L2 region is
generally disabled using the WayEnable register at a later stage in the
boot process. To allow firmware to target QEMU and the HiFive Unleashed
let's add the