subject:"\[PATCH v2 2\/3\] riscv\/sifive_u\: Add a serial property to the sifive_u SoC"

Re: [PATCH v2 2/3] riscv/sifive_u: Add a serial property to the sifive_u SoC

2020-03-05 Thread Bin Meng

On Thu, Mar 5, 2020 at 7:11 AM Alistair Francis wrote: > > At present the board serial number is hard-coded to 1, and passed > to OTP model during initialization. Firmware (FSBL, U-Boot) uses > the serial number to generate a unique MAC address for the on-chip > ethernet controller. When multiple

[PATCH v2 2/3] riscv/sifive_u: Add a serial property to the sifive_u SoC

2020-03-04 Thread Alistair Francis

At present the board serial number is hard-coded to 1, and passed to OTP model during initialization. Firmware (FSBL, U-Boot) uses the serial number to generate a unique MAC address for the on-chip ethernet controller. When multiple QEMU 'sifive_u' instances are created and connected to the same