On 3/29/23 18:09, liweiwei wrote:
@@ -51,26 +59,43 @@ static bool trans_jal(DisasContext *ctx, arg_jal *a)
static bool trans_jalr(DisasContext *ctx, arg_jalr *a)
{
TCGLabel *misaligned = NULL;
+ TCGv succ_pc = tcg_temp_new();
succ_pc can by null for !CF_PCREL...
I think this is OK
On 2023/3/30 00:27, Richard Henderson wrote:
On 3/28/23 20:23, Weiwei Li wrote:
static bool trans_auipc(DisasContext *ctx, arg_auipc *a)
{
- gen_set_gpri(ctx, a->rd, a->imm + ctx->base.pc_next);
+ assert(ctx->pc_save != -1);
+ if (tb_cflags(ctx->base.tb) & CF_PCREL) {
+ TCG
On 3/28/23 20:23, Weiwei Li wrote:
static bool trans_auipc(DisasContext *ctx, arg_auipc *a)
{
-gen_set_gpri(ctx, a->rd, a->imm + ctx->base.pc_next);
+assert(ctx->pc_save != -1);
+if (tb_cflags(ctx->base.tb) & CF_PCREL) {
+TCGv target_pc = tcg_temp_new();
dest_gpr(s, a->r
Add a base save_pc For PC-relative translation(CF_PCREL).
Diable the directly sync pc from tb by riscv_cpu_synchronize_from_tb.
Sync pc before it's used or updated from tb related pc:
real_pc = (old)env->pc + target_pc(from tb) - ctx->save_pc
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wa
