Re: [PATCH v3 01/15] target/ppc: add user read functions for MMCR0 and MMCR2

2021-09-22 Thread Daniel Henrique Barboza
On 9/22/21 08:23, Matheus K. Ferst wrote: On 03/09/2021 17:31, Daniel Henrique Barboza wrote: [E-MAIL EXTERNO] Não clique em links ou abra anexos, a menos que você possa confirmar o remetente e saber que o conteúdo é seguro. Em caso de e-mail suspeito entre imediatamente em contato com o

Re: [PATCH v3 01/15] target/ppc: add user read functions for MMCR0 and MMCR2

2021-09-22 Thread Matheus K. Ferst
On 03/09/2021 17:31, Daniel Henrique Barboza wrote: [E-MAIL EXTERNO] Não clique em links ou abra anexos, a menos que você possa confirmar o remetente e saber que o conteúdo é seguro. Em caso de e-mail suspeito entre imediatamente em contato com o DTI. From: Gustavo Romero We're going to add

Re: [PATCH v3 01/15] target/ppc: add user read functions for MMCR0 and MMCR2

2021-09-06 Thread David Gibson
On Fri, Sep 03, 2021 at 05:31:02PM -0300, Daniel Henrique Barboza wrote: > From: Gustavo Romero > > We're going to add PMU support for TCG PPC64 chips, based on IBM POWER8+ > emulation and following PowerISA v3.1. > > Let's start by handling the user read of UMMCR0 and UMMCR2. According to >

[PATCH v3 01/15] target/ppc: add user read functions for MMCR0 and MMCR2

2021-09-03 Thread Daniel Henrique Barboza
From: Gustavo Romero We're going to add PMU support for TCG PPC64 chips, based on IBM POWER8+ emulation and following PowerISA v3.1. Let's start by handling the user read of UMMCR0 and UMMCR2. According to PowerISA 3.1 these registers omit some of its bits from userspace. CC: Gustavo Romero