RE: [PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX

2021-08-10 Thread ishii.shuuic...@fujitsu.com
inaro.org; qemu-...@nongnu.org; qemu-devel@nongnu.org > Subject: Re: [PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX > > On Tue, Aug 10, 2021 at 08:23:39AM +, ishii.shuuic...@fujitsu.com wrote: > > > > Thanks for your comments. > > > > Before repost

Re: [PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX

2021-08-10 Thread Andrew Jones
erty_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, > -cpu_max_set_sve_max_vq, NULL, NULL); > } > > static const ARMCPUInfo aarch64_cpus[] = { Otherwise looks OK to me. Thanks, drew > > --- > > Best regards.

RE: [PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX

2021-08-10 Thread ishii.shuuic...@fujitsu.com
max_vq, NULL, NULL); } static const ARMCPUInfo aarch64_cpus[] = { --- Best regards. > -Original Message- > From: Andrew Jones > Sent: Thursday, August 5, 2021 8:25 PM > To: Ishii, Shuuichirou > Cc: peter.mayd...@linaro.org; qemu-...@nongnu.org; qemu-devel@nongnu.org > Subject: Re

Re: [PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX

2021-08-05 Thread Andrew Jones
On Thu, Aug 05, 2021 at 04:30:43PM +0900, Shuuichirou Ishii wrote: > Add a definition for the Fujitsu A64FX processor. > > The A64FX processor does not implement the AArch32 Execution state, > so there are no associated AArch32 Identification registers. > > Signed-off-by: Shuuichirou Ishii >

[PATCH v3 1/3] target-arm: cpu64: Add support for Fujitsu A64FX

2021-08-05 Thread Shuuichirou Ishii
Add a definition for the Fujitsu A64FX processor. The A64FX processor does not implement the AArch32 Execution state, so there are no associated AArch32 Identification registers. Signed-off-by: Shuuichirou Ishii --- target/arm/cpu64.c | 44 1 file