Re: [PATCH v3 3/4] RISC-V: support vector extension csr

2020-01-06 Thread LIU Zhiwei
On 2020/1/7 6:00, Jim Wilson wrote: On 1/2/20 7:33 PM, LIU Zhiwei wrote: Until v0.7.1 specification, vector status is still not defined for mstatus. The v0.8 spec does define a VS bit in mstatus. Yes, I will also support v0.8 spec after the v0.7.1 spec. @@ -107,11 +112,6 @@ static int

Re: [PATCH v3 3/4] RISC-V: support vector extension csr

2020-01-06 Thread Jim Wilson
On 1/2/20 7:33 PM, LIU Zhiwei wrote: Until v0.7.1 specification, vector status is still not defined for mstatus. The v0.8 spec does define a VS bit in mstatus. @@ -107,11 +112,6 @@ static int pmp(CPURISCVState *env, int csrno) /* User Floating-Point CSRs */ static int

Re: [PATCH v3 3/4] RISC-V: support vector extension csr

2020-01-03 Thread Richard Henderson
On 1/3/20 2:33 PM, LIU Zhiwei wrote: > Until v0.7.1 specification, vector status is still not defined for > mstatus. Using "until" imples that v0.7.1 *does* define the vector status. Better said as "The v0.7.1 specification does not define vector status within mstatus. A future revision will

[PATCH v3 3/4] RISC-V: support vector extension csr

2020-01-02 Thread LIU Zhiwei
Until v0.7.1 specification, vector status is still not defined for mstatus. Signed-off-by: LIU Zhiwei --- target/riscv/cpu_bits.h | 15 +++ target/riscv/csr.c | 92 + 2 files changed, 80 insertions(+), 27 deletions(-) diff --git