On Friday, October 11, 2019, Alex Bennée wrote:
>
> Aleksandar Markovic writes:
>
> > On Friday, October 11, 2019, Philippe Mathieu-Daudé
> > wrote:
> >
> >> Hi Michael,
> >>
> >> On 9/2/19 4:01 PM, Michael Rolnik wrote:
> >>
> >>> This series of patches adds 8bit AVR cores to QEMU.
> >>> All
Aleksandar Markovic writes:
> On Friday, October 11, 2019, Philippe Mathieu-Daudé
> wrote:
>
>> Hi Michael,
>>
>> On 9/2/19 4:01 PM, Michael Rolnik wrote:
>>
>>> This series of patches adds 8bit AVR cores to QEMU.
>>> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully
>>>
On Friday, October 11, 2019, Philippe Mathieu-Daudé
wrote:
> Hi Michael,
>
> On 9/2/19 4:01 PM, Michael Rolnik wrote:
>
>> This series of patches adds 8bit AVR cores to QEMU.
>> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully
>> tested yet.
>> However I was able to execute
On 9/2/19 4:01 PM, Michael Rolnik wrote:
Michael Rolnik (7):
target/avr: Add outward facing interfaces and core CPU logic
target/avr: Add instruction helpers
target/avr: Add instruction decoding
target/avr: Add instruction translation
[...]> target/avr/Makefile.objs | 33
Hi Michael,
On 9/2/19 4:01 PM, Michael Rolnik wrote:
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support
