Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-17 Thread Aleksandar Markovic
On Tuesday, December 17, 2019, Michael Rolnik wrote: > Aleksandar. > > 1. inst.decode file > 2. avr features are not accessible from avr_print_insn as it does not > receive a pointer to CPU context. So, there is not way to inform the user > that some instructions are not supported unless I

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-17 Thread Michael Rolnik
Aleksandar. 1. inst.decode file 2. avr features are not accessible from avr_print_insn as it does not receive a pointer to CPU context. So, there is not way to inform the user that some instructions are not supported unless I define several different avr_print_insn functions. Regards, Michael

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-12 Thread Aleksandar Markovic
On Tue, Dec 10, 2019 at 8:18 AM Michael Rolnik wrote: > > You are right. See at the bottom of the file. There is a comment about it > Sorry, what file? I also see that you disassemble instructions regardless of what AVR CPU the current executable is built for, don't you? OK, not a very big

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-09 Thread Michael Rolnik
You are right. See at the bottom of the file. There is a comment about it Sent from my cell phone, please ignore typos On Tue, Dec 10, 2019, 6:21 AM Aleksandar Markovic < aleksandar.m.m...@gmail.com> wrote: > > > On Monday, December 9, 2019, Michael Rolnik wrote: > >> Hi Aleksandar. >> >> 1.

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-09 Thread Aleksandar Markovic
On Monday, December 9, 2019, Michael Rolnik wrote: > Hi Aleksandar. > > 1. all instructions are 16 bit long except CALL & JMP they are 32 bit long > Accordingto the doc, LDS and STS also have 32-bit coding. > 2. next_word_used is set to true by next_word when called by append_16 > when CALL

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-09 Thread Michael Rolnik
Hi Aleksandar. 1. all instructions are 16 bit long except CALL & JMP they are 32 bit long 2. next_word_used is set to true by next_word when called by append_16 when CALL & JMP are parsed Regards, Michael Rolnik On Mon, Dec 9, 2019 at 8:10 PM Aleksandar Markovic < aleksandar.m.m...@gmail.com>

Re: [PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-09 Thread Aleksandar Markovic
On Sunday, December 8, 2019, Michael Rolnik wrote: > Provide function disassembles executed instruction when `-d in_asm` is > provided > > Example: > `./avr-softmmu/qemu-system-avr -bios > free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf > -d in_asm` will produce something like the following > > ```

[PATCH v38 11/22] target/avr: Add instruction disassembly function

2019-12-08 Thread Michael Rolnik
Provide function disassembles executed instruction when `-d in_asm` is provided Example: `./avr-softmmu/qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf -d in_asm` will produce something like the following ``` ... IN: 0x014a: CALL 0x3808 IN: main