On 2/17/23 10:29 AM, Jonathan Cameron wrote:
This register in AER should be both writeable and should
have a default value with a couple of the errors masked
including the Uncorrectable Internal Error used by CXL for
it's error reporting.
Signed-off-by: Jonathan Cameron
Reviewed-by: Dave
This register in AER should be both writeable and should
have a default value with a couple of the errors masked
including the Uncorrectable Internal Error used by CXL for
it's error reporting.
Signed-off-by: Jonathan Cameron
---
hw/pci/pcie_aer.c | 4
include/hw/pci/pcie_regs.h |
