Re: [PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*

2019-12-06 Thread Richard Henderson
On 12/6/19 7:47 AM, Peter Maydell wrote: > On Tue, 3 Dec 2019 at 02:29, Richard Henderson > wrote: >> >> This is part of a reorganization to the set of mmu_idx. >> The EL1&0 regime is the only one that uses 2-stage translation. >> Spelling out Stage avoids confusion with Secure. > > If you didn't

Re: [PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*

2019-12-06 Thread Peter Maydell
On Tue, 3 Dec 2019 at 02:29, Richard Henderson wrote: > > This is part of a reorganization to the set of mmu_idx. > The EL1&0 regime is the only one that uses 2-stage translation. > Spelling out Stage avoids confusion with Secure. If you didn't delete the 'NS' from the name then it wouldn't be co

Re: [PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*

2019-12-04 Thread Alex Bennée
Richard Henderson writes: > This is part of a reorganization to the set of mmu_idx. > The EL1&0 regime is the only one that uses 2-stage translation. > Spelling out Stage avoids confusion with Secure. > > Signed-off-by: Richard Henderson > diff --git a/target/arm/helper.c b/target/arm/helper.

[PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*

2019-12-02 Thread Richard Henderson
This is part of a reorganization to the set of mmu_idx. The EL1&0 regime is the only one that uses 2-stage translation. Spelling out Stage avoids confusion with Secure. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 4 ++-- target/arm/internals.h | 6 +++--- target/arm/helper.c