On 2020/2/28 3:36, Richard Henderson wrote:
On 2/25/20 2:35 AM, LIU Zhiwei wrote:
+GEN_VEXT_LD_ELEM(vlsb_v_b, int8_t, int8_t, H1, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_h, int8_t, int16_t, H2, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_w, int8_t, int32_t, H4, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_d, int8_t,
On 2020/2/28 3:36, Richard Henderson wrote:
On 2/25/20 2:35 AM, LIU Zhiwei wrote:
+GEN_VEXT_LD_ELEM(vlsb_v_b, int8_t, int8_t, H1, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_h, int8_t, int16_t, H2, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_w, int8_t, int32_t, H4, ldsb)
+GEN_VEXT_LD_ELEM(vlsb_v_d, int8_t,
On 2/25/20 2:35 AM, LIU Zhiwei wrote:
> +GEN_VEXT_LD_ELEM(vlsb_v_b, int8_t, int8_t, H1, ldsb)
> +GEN_VEXT_LD_ELEM(vlsb_v_h, int8_t, int16_t, H2, ldsb)
> +GEN_VEXT_LD_ELEM(vlsb_v_w, int8_t, int32_t, H4, ldsb)
> +GEN_VEXT_LD_ELEM(vlsb_v_d, int8_t, int64_t, H8, ldsb)
>
Vector strided operations access the first memory element at the base address,
and then access subsequent elements at address increments given by the byte
offset contained in the x register specified by rs2.
Signed-off-by: LIU Zhiwei
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target/riscv/helper.h | 35 +