On 3/17/20 8:06 AM, LIU Zhiwei wrote:
> +if (s->vl_eq_vlmax) {
> +#ifdef TARGET_RISCV64
> +tcg_gen_gvec_dup_i64(s->sew, vreg_ofs(s, a->rd),
> + MAXSZ(s), MAXSZ(s), s1);
> +#else
> +tcg_gen_gvec_dup_i32(s->sew, vreg_ofs(s, a->rd),
> +
On Tue, Mar 17, 2020 at 8:53 AM LIU Zhiwei wrote:
>
> Signed-off-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/helper.h | 17
> target/riscv/insn32.decode | 7 ++
> target/riscv/insn_trans/trans_rvv.inc.c | 121
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h | 17
target/riscv/insn32.decode | 7 ++
target/riscv/insn_trans/trans_rvv.inc.c | 121
target/riscv/vector_helper.c| 100
4 files changed, 245
