Re: [PATCH v6 3/7] target/riscv: access configuration through cfg_ptr in DisasContext

2022-02-07 Thread Alistair Francis
On Tue, Feb 8, 2022 at 4:07 PM Alistair Francis wrote: > > On Wed, Feb 2, 2022 at 11:26 AM Philipp Tomsich > wrote: > > > > The implementation in trans_{rvi,rvv,rvzfh}.c.inc accesses the shallow > > copies (in DisasContext) of some of the elements available in the > > RISCVCPUConfig structure.

Re: [PATCH v6 3/7] target/riscv: access configuration through cfg_ptr in DisasContext

2022-02-07 Thread Alistair Francis
On Wed, Feb 2, 2022 at 11:26 AM Philipp Tomsich wrote: > > The implementation in trans_{rvi,rvv,rvzfh}.c.inc accesses the shallow > copies (in DisasContext) of some of the elements available in the > RISCVCPUConfig structure. This commit redirects accesses to use the > cfg_ptr copied into

[PATCH v6 3/7] target/riscv: access configuration through cfg_ptr in DisasContext

2022-02-01 Thread Philipp Tomsich
The implementation in trans_{rvi,rvv,rvzfh}.c.inc accesses the shallow copies (in DisasContext) of some of the elements available in the RISCVCPUConfig structure. This commit redirects accesses to use the cfg_ptr copied into DisasContext and removes the shallow copies. Signed-off-by: Philipp