On Mon, Mar 11, 2024 at 05:03:02PM +0800, Xiaoyao Li wrote:
> Date: Mon, 11 Mar 2024 17:03:02 +0800
> From: Xiaoyao Li
> Subject: Re: [PATCH v9 06/21] i386/cpu: Use APIC ID info to encode cache
> topo in CPUID[4]
>
> On 3/10/2024 9:38 PM, Zhao Liu wro
On 3/10/2024 9:38 PM, Zhao Liu wrote:
Hi Xiaoyao,
case 3: /* L3 cache info */
-die_offset = apicid_die_offset(_info);
if (cpu->enable_l3_cache) {
+addressable_threads_width = apicid_die_offset(_info);
Please get rid of the
Hi Xiaoyao,
Did the following reason convince you? Could I take your r/b tag with
current code? ;-)
Thanks,
Zhao
On Sun, Mar 10, 2024 at 09:38:19PM +0800, Zhao Liu wrote:
> Date: Sun, 10 Mar 2024 21:38:19 +0800
> From: Zhao Liu
> Subject: Re: [PATCH v9 06/21] i386/cpu: Use API
Hi Xiaoyao,
> > case 3: /* L3 cache info */
> > -die_offset = apicid_die_offset(_info);
> > if (cpu->enable_l3_cache) {
> > +addressable_threads_width =
> > apicid_die_offset(_info);
>
> Please get rid of the local variable
On 2/27/2024 6:32 PM, Zhao Liu wrote:
From: Zhao Liu
Refer to the fixes of cache_info_passthrough ([1], [2]) and SDM, the
CPUID.04H:EAX[bits 25:14] and CPUID.04H:EAX[bits 31:26] should use the
nearest power-of-2 integer.
The nearest power-of-2 integer can be calculated by pow2ceil() or by
From: Zhao Liu
Refer to the fixes of cache_info_passthrough ([1], [2]) and SDM, the
CPUID.04H:EAX[bits 25:14] and CPUID.04H:EAX[bits 31:26] should use the
nearest power-of-2 integer.
The nearest power-of-2 integer can be calculated by pow2ceil() or by
using APIC ID offset/width (like L3
