Re: [PULL 1/6] target/riscv: Don't set write permissions on dirty PTEs

On Tue, Apr 21, 2020 at 12:19 PM Palmer Dabbelt wrote: > > From: Alistair Francis > > The RISC-V spec specifies that when a write happens and the D bit is > clear the implementation will set the bit in the PTE. It does not > describe that the PTE being dirty means that we should provide write >

[PULL 1/6] target/riscv: Don't set write permissions on dirty PTEs

From: Alistair Francis The RISC-V spec specifies that when a write happens and the D bit is clear the implementation will set the bit in the PTE. It does not describe that the PTE being dirty means that we should provide write access. This patch removes the write access granted to pages when the