From: Jonathan Cameron <jonathan.came...@huawei.com> This infrastructure will be reused for CXL RAS error injection in patches that follow.
Reviewed-by: Dave Jiang <dave.ji...@intel.com> Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com> Message-Id: <20230302133709.30373-8-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin <m...@redhat.com> Signed-off-by: Michael S. Tsirkin <m...@redhat.com> Reviewed-by: Fan Ni <fan...@samsung.com> --- hw/pci/pci-internal.h | 1 - include/hw/pci/pcie_aer.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci/pci-internal.h b/hw/pci/pci-internal.h index 2ea356bdf5..a7d6d8a732 100644 --- a/hw/pci/pci-internal.h +++ b/hw/pci/pci-internal.h @@ -20,6 +20,5 @@ void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent); int pcie_aer_parse_error_string(const char *error_name, uint32_t *status, bool *correctable); -int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err); #endif diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h index 65e71d98fe..1234fdc4e2 100644 --- a/include/hw/pci/pcie_aer.h +++ b/include/hw/pci/pcie_aer.h @@ -100,4 +100,5 @@ void pcie_aer_root_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len, uint32_t root_cmd_prev); +int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err); #endif /* QEMU_PCIE_AER_H */ -- MST