** Tags added: mips
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https://bugs.launchpad.net/bugs/1663287
Title:
Illegal delay slot code causes abort on mips64
Status in QEMU:
New
Bug description:
During some randomised
** Changed in: qemu
Status: Fix Released => New
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https://bugs.launchpad.net/bugs/1663287
Title:
Illegal delay slot code causes abort on mips64
Status in QEMU:
New
Bug
Thanks for that fix. I've just noticed that the second part, in
gen_compute_branch1, wasn't included, though. Could you take a look at
it?
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https://bugs.launchpad.net/bugs/1663287
http://git.qemu.org/?p=qemu.git;a=commitdiff;h=075a1fe788d36b271ec2
** Changed in: qemu
Status: Fix Committed => Fix Released
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Title:
Thanks for reporting this issue.
In fact, branches in a delay slot is "undefined" in the pre-Release 6
architecture.
MIPS architectre release 6 defines to signal Reserved Instruction exceptions
for such cases.
However as it was undefined, it is better to signal RI and carry on rather than
** Changed in: qemu
Status: New => Fix Committed
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https://bugs.launchpad.net/bugs/1663287
Title:
Illegal delay slot code causes abort on mips64
Status in QEMU:
Fix Committed
I've just found the same problem with gen_compute_branch1,
0028 jr at
4540563a bc1any4f $fcc0,0xbfc158ec
The cause is the same - if the instruction set is wrong then the delay
slot check is skipped.
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