I have access to lots of Power hardware, and happy to test and help
however I can! Thanks, Mark!
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https://bugs.launchpad.net/bugs/1841990
Title:
instruction 'denbcdq' misbehaving
Sta
Thanks for the report Paul (and also the investigation work Philippe).
So yes it seems the DFP code is another fallout from the conversion of
the floating point registers over to host-endian/VSR format. I've had a
quick look at this and it seems that the simple fix to compensate for
the FP registe
This seems related to this change:
commit ef96e3ae9698d6726a8113f448c82985a9f31ff5
Author: Mark Cave-Ayland
Date: Wed Jan 2 09:14:22 2019 +
target/ppc: move FP and VMX registers into aligned vsr register array
The VSX register array is a block of 64 128-bit registers where the
@Philippe, thank you for spending the time to find a compiler that works with
the testcase. I've been operating on RHEL 8 primarily:
gcc version 8.2.1 20180905 (Red Hat 8.2.1-3) (GCC)
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h
FWIW I could compile the attached test with:
$ gcc -v
gcc version 8.3.1 20190507 (Red Hat 8.3.1-4) (GCC)
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https://bugs.launchpad.net/bugs/1841990
Title:
instruction 'denbcdq' misbehav
I tried to compile your test program with 2 different GCC versions but
it keeps failing, do you need a special/recent version? Meanwhile can
you attach a statically linked binary?
$ gcc -v
gcc version 6.3.0 20170516 (Debian 6.3.0-18)
$ gcc -g -O -mcpu=power9 test-denbcdq.c -o test-denbcdq
test-d
** Tags added: ppc64 testcase
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https://bugs.launchpad.net/bugs/1841990
Title:
instruction 'denbcdq' misbehaving
Status in QEMU:
New
Bug description:
Instruction 'denbcdq' appears