Re: [Qemu-devel] [PATCH] hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller

2019-01-04 Thread Philippe Mathieu-Daudé
On Fri, Jan 4, 2019 at 3:10 PM Peter Maydell wrote: > On Sun, 9 Dec 2018 at 19:37, Philippe Mathieu-Daudé wrote: > > From the "A10 User Manual V1.20" p.29: "3.2. Memory Mapping" and: > > > > 7. System Control > > 7.1. Overview > > > > A10 embeds a high-speed SRAM which has been split into fi

Re: [Qemu-devel] [PATCH] hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller

2019-01-04 Thread Peter Maydell
On Sun, 9 Dec 2018 at 19:37, Philippe Mathieu-Daudé wrote: > > From the "A10 User Manual V1.20" p.29: "3.2. Memory Mapping" and: > > 7. System Control > 7.1. Overview > > A10 embeds a high-speed SRAM which has been split into five segments. > See detailed memory mapping in following table:

[Qemu-devel] [PATCH] hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller

2018-12-09 Thread Philippe Mathieu-Daudé
>From the "A10 User Manual V1.20" p.29: "3.2. Memory Mapping" and: 7. System Control 7.1. Overview A10 embeds a high-speed SRAM which has been split into five segments. See detailed memory mapping in following table: Area AddressSize (Bytes) A10x-0x3F