Re: [Qemu-devel] [PATCH] i386: amd_iommu: fix MMIO register count and access

2016-12-13 Thread Michael S. Tsirkin
On Tue, Dec 13, 2016 at 03:42:13PM +0530, P J P wrote: > +-- On Fri, 2 Dec 2016, P J P wrote --+ > | IOMMU MMIO registers are divided in two groups by their offsets. > | Low offsets(<0x2000) registers are grouped into 'amdvi_mmio_low' > | table and higher offsets(>=0x2000) registers are grouped int

Re: [Qemu-devel] [PATCH] i386: amd_iommu: fix MMIO register count and access

2016-12-13 Thread P J P
+-- On Fri, 2 Dec 2016, P J P wrote --+ | IOMMU MMIO registers are divided in two groups by their offsets. | Low offsets(<0x2000) registers are grouped into 'amdvi_mmio_low' | table and higher offsets(>=0x2000) registers are grouped into | 'amdvi_mmio_high' table. No of registers in each table is g

[Qemu-devel] [PATCH] i386: amd_iommu: fix MMIO register count and access

2016-12-02 Thread P J P
From: Prasad J Pandit IOMMU MMIO registers are divided in two groups by their offsets. Low offsets(<0x2000) registers are grouped into 'amdvi_mmio_low' table and higher offsets(>=0x2000) registers are grouped into 'amdvi_mmio_high' table. No of registers in each table is given by macro 'AMDVI_MMI