On 20/01/18 20:10, Artyom Tarasenko wrote:
Hi Mark,
On Mon, Jan 15, 2018 at 9:58 PM, Mark Cave-Ayland
wrote:
This inbuilt device contains a single 4-byte register, of which bit 24 is used
to power down the machine on a real Ultra 5.
The power device exists at offset 0x724000 on a real machi
Hi Mark,
On Mon, Jan 15, 2018 at 9:58 PM, Mark Cave-Ayland
wrote:
> This inbuilt device contains a single 4-byte register, of which bit 24 is used
> to power down the machine on a real Ultra 5.
>
> The power device exists at offset 0x724000 on a real machine, but due to the
> current configurati
On 16/01/2018 22:05, Mark Cave-Ayland wrote:
On 16/01/18 14:23, Marcel Apfelbaum wrote:
Hi Philippe,
On 16/01/2018 2:54, Philippe Mathieu-Daudé wrote:
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
This inbuilt device contains a single 4-byte register, of
On 16/01/18 14:23, Marcel Apfelbaum wrote:
Hi Philippe,
On 16/01/2018 2:54, Philippe Mathieu-Daudé wrote:
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
This inbuilt device contains a single 4-byte register, of which bit
24 is used
to power down the machin
On 16/01/18 00:54, Philippe Mathieu-Daudé wrote:
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
This inbuilt device contains a single 4-byte register, of which bit 24 is used
to power down the machine on a real Ultra 5.
The power device exists at offset 0x72
Hi Philippe,
On 16/01/2018 2:54, Philippe Mathieu-Daudé wrote:
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
This inbuilt device contains a single 4-byte register, of which bit 24 is used
to power down the machine on a real Ultra 5.
The power device exists
CC'ing PCI maintainers.
Hi Mark,
On 01/15/2018 05:58 PM, Mark Cave-Ayland wrote:
> This inbuilt device contains a single 4-byte register, of which bit 24 is used
> to power down the machine on a real Ultra 5.
>
> The power device exists at offset 0x724000 on a real machine, but due to the
> curr
This inbuilt device contains a single 4-byte register, of which bit 24 is used
to power down the machine on a real Ultra 5.
The power device exists at offset 0x724000 on a real machine, but due to the
current configuration of the BARs in QEMU it must be located lower in PCI IO
space.
For the mome