On Tue, Jan 09, 2018 at 01:45:12PM -0200, Eduardo Habkost wrote:
> This series adds support for the new IA32_SPEC_CTRL MSR on Intel
> CPU models. The new MSR and the spec-ctrl CPUID bit
> (CPUID[EAX=7,ECX=0].EDX[bit 26]) were introduced by a recent
> Intel microcode updated and can be used by
I'm queueing patches 1-5 on x86-next.
On Tue, Jan 09, 2018 at 01:45:12PM -0200, Eduardo Habkost wrote:
> This series adds support for the new IA32_SPEC_CTRL MSR on Intel
> CPU models. The new MSR and the spec-ctrl CPUID bit
> (CPUID[EAX=7,ECX=0].EDX[bit 26]) were introduced by a recent
> Intel
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180109154519.25634-1-ehabk...@redhat.com
Subject: [Qemu-devel] [PATCH 0/7] CPU model updates
This series adds support for the new IA32_SPEC_CTRL MSR on Intel
CPU models. The new MSR and the spec-ctrl CPUID bit
(CPUID[EAX=7,ECX=0].EDX[bit 26]) were introduced by a recent
Intel microcode updated and can be used by OSes to mitigate
CVE-2017-5715.
It also adds a new EPYC-IBPB CPU model that
