(2011/10/12 2:00), Lai Jiangshan wrote:
From: Kenji Kaneshigekaneshige.ke...@jp.fujitsu.com
Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
button event happens. This doesn't properly emulate real hardware on
which NMI button event triggers LINT1. Because of this, NMI is
From: Kenji Kaneshige kaneshige.ke...@jp.fujitsu.com
Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
button event happens. This doesn't properly emulate real hardware on
which NMI button event triggers LINT1. Because of this, NMI is sent to
the processor even when LINT1 is
[ dropped unaffected seabios from CC ]
On 2011-10-11 19:00, Lai Jiangshan wrote:
From: Kenji Kaneshige kaneshige.ke...@jp.fujitsu.com
Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
button event happens. This doesn't properly emulate real hardware on
which NMI button
