Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 14.01.2016 21:34, Peter Maydell wrote: > Support EL2 and EL3 in arm_el_is_aa64() by implementing the > logic for checking the SCR_EL3 and HCR_EL2 register-width bits > as appropriate to determine the register width of lower exception > levels. Reviewed-by: Sergey Fedorov

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 29.01.2016 19:45, Sergey Fedorov wrote: > On 14.01.2016 21:34, Peter Maydell wrote: >> > Support EL2 and EL3 in arm_el_is_aa64() by implementing the >> > logic for checking the SCR_EL3 and HCR_EL2 register-width bits >> > as appropriate to determine the register width of lower exception >> >

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 29.01.2016 20:05, Peter Maydell wrote: > On 29 January 2016 at 16:45, Sergey Fedorov wrote: >> > On 14.01.2016 21:34, Peter Maydell wrote: >>> >> Support EL2 and EL3 in arm_el_is_aa64() by implementing the >>> >> logic for checking the SCR_EL3 and HCR_EL2 register-width

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 29 January 2016 at 16:45, Sergey Fedorov wrote: > On 14.01.2016 21:34, Peter Maydell wrote: >> Support EL2 and EL3 in arm_el_is_aa64() by implementing the >> logic for checking the SCR_EL3 and HCR_EL2 register-width bits >> as appropriate to determine the register width

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On Thu, Jan 14, 2016 at 06:34:04PM +, Peter Maydell wrote: > Support EL2 and EL3 in arm_el_is_aa64() by implementing the > logic for checking the SCR_EL3 and HCR_EL2 register-width bits > as appropriate to determine the register width of lower exception > levels. > > Signed-off-by: Peter

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 15 January 2016 at 14:38, Edgar E. Iglesias wrote: > On Thu, Jan 14, 2016 at 06:34:04PM +, Peter Maydell wrote: >> Support EL2 and EL3 in arm_el_is_aa64() by implementing the >> logic for checking the SCR_EL3 and HCR_EL2 register-width bits >> as appropriate to

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On 15 January 2016 at 15:37, Edgar E. Iglesias wrote: > On Fri, Jan 15, 2016 at 02:50:24PM +, Peter Maydell wrote: >> Do you have much locally extra that you needed for enabling >> EL3 in the Cortex-A53? I have an ARM Trusted Firmware + OP-TEE >> setup now that I'm

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On Fri, Jan 15, 2016 at 02:50:24PM +, Peter Maydell wrote: > On 15 January 2016 at 14:38, Edgar E. Iglesias > wrote: > > On Thu, Jan 14, 2016 at 06:34:04PM +, Peter Maydell wrote: > >> Support EL2 and EL3 in arm_el_is_aa64() by implementing the > >> logic for

Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

On Fri, Jan 15, 2016 at 03:47:17PM +, Peter Maydell wrote: > On 15 January 2016 at 15:37, Edgar E. Iglesias > wrote: > > On Fri, Jan 15, 2016 at 02:50:24PM +, Peter Maydell wrote: > >> Do you have much locally extra that you needed for enabling > >> EL3 in the

[Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()

Support EL2 and EL3 in arm_el_is_aa64() by implementing the logic for checking the SCR_EL3 and HCR_EL2 register-width bits as appropriate to determine the register width of lower exception levels. Signed-off-by: Peter Maydell --- target-arm/cpu.h | 33