Re: [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes

2017-01-27 Thread Alex Bennée
Kirill Batuzov writes: > To be able to generate vector operations in a TCG backend we need to do > several things. > > 1. We need to tell the register allocator about vector target's register. >In case of x86 we'll use xmm0..xmm7. xmm7 is designated as a scratch >

Re: [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes

2017-01-18 Thread Richard Henderson
On 01/18/2017 05:05 AM, Kirill Batuzov wrote: Why are you not defining xmm8-15? At first I thought about supporting both x86_64 and i386 targets, but put this idea away (at least for the time being). Since defining xmm8-15 does not contradict anything (as I see it now) I'll add them too.

Re: [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes

2017-01-18 Thread Kirill Batuzov
On Tue, 17 Jan 2017, Richard Henderson wrote: > On 01/17/2017 01:07 AM, Kirill Batuzov wrote: > > To be able to generate vector operations in a TCG backend we need to do > > several things. > > > > 1. We need to tell the register allocator about vector target's register. > >In case of x86

Re: [Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes

2017-01-17 Thread Richard Henderson
On 01/17/2017 01:07 AM, Kirill Batuzov wrote: To be able to generate vector operations in a TCG backend we need to do several things. 1. We need to tell the register allocator about vector target's register. In case of x86 we'll use xmm0..xmm7. xmm7 is designated as a scratch register,

[Qemu-devel] [PATCH 10/18] tcg/i386: add support for vector opcodes

2017-01-17 Thread Kirill Batuzov
To be able to generate vector operations in a TCG backend we need to do several things. 1. We need to tell the register allocator about vector target's register. In case of x86 we'll use xmm0..xmm7. xmm7 is designated as a scratch register, others can be used by the register allocator. 2.