On Thu, 19 Feb 2015, Leon Alrae wrote:
Surely these fp_status fields are simply implementation of the architectural
CSR registers?
IMO you shouldn't store things related to TCG state, but always how the
architecture represents it. That way you're free to change the TCG
On 02/18/2015 06:51 AM, Leon Alrae wrote:
static VMStateField vmstate_fpu_fields[] = {
VMSTATE_FPR_ARRAY(fpr, CPUMIPSFPUContext, 32),
-VMSTATE_INT8(fp_status.float_detect_tininess, CPUMIPSFPUContext),
+VMSTATE_UINT8(fp_status.flush_to_zero, CPUMIPSFPUContext),
On 19/02/2015 15:43, Richard Henderson wrote:
On 02/18/2015 06:51 AM, Leon Alrae wrote:
static VMStateField vmstate_fpu_fields[] = {
VMSTATE_FPR_ARRAY(fpr, CPUMIPSFPUContext, 32),
-VMSTATE_INT8(fp_status.float_detect_tininess, CPUMIPSFPUContext),
+
Correct the structure and store MSA and FP flush_to_zero.
Signed-off-by: Leon Alrae leon.al...@imgtec.com
---
target-mips/machine.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/target-mips/machine.c b/target-mips/machine.c
index 8d75962..c08e593
