Re: [Qemu-devel] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmus

2019-03-26 Thread Andrew Jones
On Tue, Mar 26, 2019 at 05:38:36PM +, Aaron Lindsay OS wrote: > On Mar 22 17:23, Andrew Jones wrote: > > cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise > > them in ID_DFR0. Let's allow them to function. This also enables > > the pmu cpu property to work with these cpu types,

Re: [Qemu-devel] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmus

2019-03-26 Thread Aaron Lindsay OS
On Mar 22 17:23, Andrew Jones wrote: > cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise > them in ID_DFR0. Let's allow them to function. This also enables > the pmu cpu property to work with these cpu types, i.e. we can > now do '-cpu cortex-a15,pmu=off' to remove the pmu. I'm a

[Qemu-devel] [PATCH 2/3] target/arm: cortex-a7 and cortex-a15 have pmus

2019-03-22 Thread Andrew Jones
cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise them in ID_DFR0. Let's allow them to function. This also enables the pmu cpu property to work with these cpu types, i.e. we can now do '-cpu cortex-a15,pmu=off' to remove the pmu. Signed-off-by: Andrew Jones --- target/arm/cpu.c | 3