Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Sat, Feb 06, 2016 at 01:48:19PM +, Peter Maydell wrote: > On 6 February 2016 at 12:17, Edgar E. Iglesias > wrote: > > It seems to me like if EL3 is running in AArch32, then we shouldn't > > trap accesses from Secure EL1 but I can't find that logic. Am I missing >

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Wed, Feb 03, 2016 at 01:38:37PM +, Peter Maydell wrote: > The registers MVBAR and SCR should have the behaviour of trapping to > EL3 if accessed from Secure EL1, but we were incorrectly implementing > them to UNDEF (which would trap to EL1). Fix this by using the new >

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On Wed, Feb 03, 2016 at 01:38:37PM +, Peter Maydell wrote: > The registers MVBAR and SCR should have the behaviour of trapping to > EL3 if accessed from Secure EL1, but we were incorrectly implementing > them to UNDEF (which would trap to EL1). Fix this by using the new >

Re: [Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

On 6 February 2016 at 12:17, Edgar E. Iglesias wrote: > It seems to me like if EL3 is running in AArch32, then we shouldn't > trap accesses from Secure EL1 but I can't find that logic. Am I missing > something? If EL3 is running in AArch32 then there is no Secure EL1 --

[Qemu-devel] [PATCH 3/7] target-arm: Use access_trap_aa32s_el1() for SCR and MVBAR

The registers MVBAR and SCR should have the behaviour of trapping to EL3 if accessed from Secure EL1, but we were incorrectly implementing them to UNDEF (which would trap to EL1). Fix this by using the new access_trap_aa32s_el1() access function. Signed-off-by: Peter Maydell