Re: [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions

2016-10-07 Thread James Hogan
On Fri, Oct 07, 2016 at 05:05:30PM +0100, Yongbok Kim wrote: > On 07/10/2016 16:48, James Hogan wrote: > > On Fri, Oct 07, 2016 at 04:34:27PM +0100, Yongbok Kim wrote: > >>> diff --git a/target-mips/translate.c b/target-mips/translate.c > >>> index df2befbd5294..8506c39a359c 100644 > >>> ---

Re: [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions

2016-10-07 Thread Yongbok Kim
On 07/10/2016 16:48, James Hogan wrote: > On Fri, Oct 07, 2016 at 04:34:27PM +0100, Yongbok Kim wrote: >> >> >> On 06/09/2016 12:03, James Hogan wrote: >>> Implement decoding of EVA loads and stores. These access the user >>> address space from kernel mode when implemented, so for each

Re: [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions

2016-10-07 Thread James Hogan
On Fri, Oct 07, 2016 at 04:34:27PM +0100, Yongbok Kim wrote: > > > On 06/09/2016 12:03, James Hogan wrote: > > Implement decoding of EVA loads and stores. These access the user > > address space from kernel mode when implemented, so for each instruction > > we need to check that EVA is available

Re: [Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions

2016-10-07 Thread Yongbok Kim
On 06/09/2016 12:03, James Hogan wrote: > Implement decoding of EVA loads and stores. These access the user > address space from kernel mode when implemented, so for each instruction > we need to check that EVA is available from Config5.EVA & check for > sufficient COP0 privelege (with the new

[Qemu-devel] [PATCH 3/9] target-mips: Decode EVA load & store instructions

2016-09-06 Thread James Hogan
Implement decoding of EVA loads and stores. These access the user address space from kernel mode when implemented, so for each instruction we need to check that EVA is available from Config5.EVA & check for sufficient COP0 privelege (with the new check_eva()), and then override the mem_idx used