Re: [Qemu-devel] [PATCH 5/5] target-ppc: Handle cases when multi-processors get machine-check

2014-08-26 Thread David Gibson
On Mon, Aug 25, 2014 at 07:15:54PM +0530, Aravinda Prasad wrote: It is possible for multi-processors to experience machine check at or about the same time. As per PAPR, subsequent processors serialize waiting for the first processor to issue the ibm,nmi-interlock call. The second processor

Re: [Qemu-devel] [PATCH 5/5] target-ppc: Handle cases when multi-processors get machine-check

2014-08-26 Thread Aravinda Prasad
On Tuesday 26 August 2014 11:34 AM, David Gibson wrote: On Mon, Aug 25, 2014 at 07:15:54PM +0530, Aravinda Prasad wrote: It is possible for multi-processors to experience machine check at or about the same time. As per PAPR, subsequent processors serialize waiting for the first processor to

[Qemu-devel] [PATCH 5/5] target-ppc: Handle cases when multi-processors get machine-check

2014-08-25 Thread Aravinda Prasad
It is possible for multi-processors to experience machine check at or about the same time. As per PAPR, subsequent processors serialize waiting for the first processor to issue the ibm,nmi-interlock call. The second processor retries if the first processor which received a machine check is still