Re: [Qemu-devel] [PATCH 5/8] target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target

2016-01-29 Thread Sergey Fedorov
On 14.01.2016 21:34, Peter Maydell wrote: > The entry offset when taking an exception to AArch64 from a lower > exception level may be 0x400 or 0x600. 0x400 is used if the > implemented exception level immediately lower than the target level > is using AArch64, and 0x600 if it is using AArch32. We

Re: [Qemu-devel] [PATCH 5/8] target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target

2016-01-19 Thread Edgar E. Iglesias
On Thu, Jan 14, 2016 at 06:34:08PM +, Peter Maydell wrote: > The entry offset when taking an exception to AArch64 from a lower > exception level may be 0x400 or 0x600. 0x400 is used if the > implemented exception level immediately lower than the target level > is using AArch64, and 0x600 if it

[Qemu-devel] [PATCH 5/8] target-arm: Fix wrong AArch64 entry offset for EL2/EL3 target

2016-01-14 Thread Peter Maydell
The entry offset when taking an exception to AArch64 from a lower exception level may be 0x400 or 0x600. 0x400 is used if the implemented exception level immediately lower than the target level is using AArch64, and 0x600 if it is using AArch32. We were incorrectly implementing this as checking