Re: [Qemu-devel] [PATCH 7/9] target-mips: Add segmentation control registers

2017-07-06 Thread James Hogan
On Mon, Oct 10, 2016 at 03:57:08PM +0100, Yongbok Kim wrote: > > > On 06/09/2016 12:03, James Hogan wrote: > > The optional segmentation control registers CP0_SegCtl0, CP0_SegCtl1 & > > CP0_SegCtl2 control the behaviour and required privilege of the legacy > > virtual memory segments. > > > > Ad

Re: [Qemu-devel] [PATCH 7/9] target-mips: Add segmentation control registers

2016-10-10 Thread Yongbok Kim
On 06/09/2016 12:03, James Hogan wrote: > The optional segmentation control registers CP0_SegCtl0, CP0_SegCtl1 & > CP0_SegCtl2 control the behaviour and required privilege of the legacy > virtual memory segments. > > Add them to the CP0 interface so they can be read and written when > CP0_Config

[Qemu-devel] [PATCH 7/9] target-mips: Add segmentation control registers

2016-09-06 Thread James Hogan
The optional segmentation control registers CP0_SegCtl0, CP0_SegCtl1 & CP0_SegCtl2 control the behaviour and required privilege of the legacy virtual memory segments. Add them to the CP0 interface so they can be read and written when CP0_Config3.SC=1, and initialise them to describe the standard l