Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-30 Thread Rabin Vincent
On Wed, Sep 28, 2016 at 12:42:41PM +0200, Edgar E. Iglesias wrote: > I've applied these except patch #7 "ignore prefix insns in > singlestep". Patch #8 had an issue with checkpatch that I fixed up. Oops, thank you.

Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-28 Thread Edgar E. Iglesias
On Mon, Sep 26, 2016 at 09:17:33AM +0200, Rabin Vincent wrote: > On Tue, Sep 13, 2016 at 12:18:00AM +0200, Edgar E. Iglesias wrote: > > On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote: > > > diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c > > > index

Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-26 Thread Rabin Vincent
On Tue, Sep 13, 2016 at 12:18:00AM +0200, Edgar E. Iglesias wrote: > On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote: > > diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c > > index a3da425..33d86eb 100644 > > --- a/target-cris/translate_v10.c > > +++

Re: [Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-12 Thread Edgar E. Iglesias
On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote: > From: Rabin Vincent > > In the CRIS v17 CPU an ADDC (add with carry) instruction has been added > compared to the v10 instruction set. > > Assembler syntax: > > ADDC [Rs],Rd > ADDC [Rs+],Rd > > Size: Dword

[Qemu-devel] [PATCH 8/9] target-cris: add v17 CPU

2016-09-05 Thread Rabin Vincent
From: Rabin Vincent In the CRIS v17 CPU an ADDC (add with carry) instruction has been added compared to the v10 instruction set. Assembler syntax: ADDC [Rs],Rd ADDC [Rs+],Rd Size: Dword Description: The source data is added together with the carry flag to the