On 09/08/2016 03:31 PM, Michael Rolnik wrote:
+int arc_gen_BCLR(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2)
+{
+TCGv rslt = dest;
+
+if (TCGV_EQUAL(dest, src1) || TCGV_EQUAL(dest, src2)) {
+rslt = tcg_temp_new_i32();
+}
+
+tcg_gen_andi_tl(rslt, src2, 0x3f);
0x1f, in
Signed-off-by: Michael Rolnik
---
target-arc/translate-inst.c | 139
target-arc/translate-inst.h | 6 ++
2 files changed, 145 insertions(+)
diff --git a/target-arc/translate-inst.c b/target-arc/translate-inst.c
index 2a579f8..91b7037 100644
--- a/ta
