Signed-off-by: Kirill Batuzov <batuz...@ispras.ru> --- tcg/tcg-op.h | 38 ++++++++++++++++++++++++++++++++++++++ tcg/tcg-opc.h | 18 ++++++++++++++++++ 2 files changed, 56 insertions(+)
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 517745e..250493b 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -501,6 +501,44 @@ static inline void tcg_gen_discard_v64(TCGv_v64 arg) tcg_gen_op1_v64(INDEX_op_discard, arg); } +static inline void tcg_gen_ldst_op_v128(TCGOpcode opc, TCGv_v128 val, + TCGv_ptr base, TCGArg offset) +{ + tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_V128(val), GET_TCGV_PTR(base), + offset); +} + +static inline void tcg_gen_st_v128(TCGv_v128 arg1, TCGv_ptr arg2, + tcg_target_long offset) +{ + tcg_gen_ldst_op_v128(INDEX_op_st_v128, arg1, arg2, offset); +} + +static inline void tcg_gen_ld_v128(TCGv_v128 ret, TCGv_ptr arg2, + tcg_target_long offset) +{ + tcg_gen_ldst_op_v128(INDEX_op_ld_v128, ret, arg2, offset); +} + +static inline void tcg_gen_ldst_op_v64(TCGOpcode opc, TCGv_v64 val, + TCGv_ptr base, TCGArg offset) +{ + tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_V64(val), GET_TCGV_PTR(base), + offset); +} + +static inline void tcg_gen_st_v64(TCGv_v64 arg1, TCGv_ptr arg2, + tcg_target_long offset) +{ + tcg_gen_ldst_op_v64(INDEX_op_st_v64, arg1, arg2, offset); +} + +static inline void tcg_gen_ld_v64(TCGv_v64 ret, TCGv_ptr arg2, + tcg_target_long offset) +{ + tcg_gen_ldst_op_v64(INDEX_op_ld_v64, ret, arg2, offset); +} + /* 64 bit ops */ void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index f06f894..2365c97 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -42,6 +42,18 @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END) # define IMPL64 TCG_OPF_64BIT #endif +#ifdef TCG_TARGET_HAS_REG128 +# define IMPL128 0 +#else +# define IMPL128 TCG_OPF_NOT_PRESENT +#endif + +#ifdef TCG_TARGET_HAS_REGV64 +# define IMPLV64 0 +#else +# define IMPLV64 TCG_OPF_NOT_PRESENT +#endif + DEF(mb, 0, 0, 1, 0) DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT) @@ -188,6 +200,12 @@ DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) #define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) #define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) +/* load/store */ +DEF(st_v128, 0, 2, 1, IMPL128) +DEF(ld_v128, 1, 1, 1, IMPL128) +DEF(st_v64, 0, 2, 1, IMPLV64) +DEF(ld_v64, 1, 1, 1, IMPLV64) + /* QEMU specific */ DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS, TCG_OPF_NOT_PRESENT) -- 2.1.4