Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/07/2016 11:53 PM, Benjamin Herrenschmidt wrote: > On Wed, 2016-09-07 at 17:47 +0200, Cédric Le Goater wrote: >> >> +static uint64_t pnv_lpc_xscom_mr_read(void *opaque, hwaddr addr, >> unsigned size) >> +{ >> +XScomDevice *xd = XSCOM_DEVICE(opaque); >> +uint64_t val = 0; >> + >> +

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, 2016-09-07 at 17:47 +0200, Cédric Le Goater wrote: >  > +static uint64_t pnv_lpc_xscom_mr_read(void *opaque, hwaddr addr, > unsigned size) > +{ > +XScomDevice *xd = XSCOM_DEVICE(opaque); > +uint64_t val = 0; > + > +pnv_lpc_xscom_read(xd, 0, xscom_to_pcb_addr(xd->chip_type, >

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, 2016-09-07 at 17:55 +0200, Cédric Le Goater wrote: > > yes. To hack my way through again, I have added a memory region under > the XScomDevice, but we should have a list like the ranges[] because of  > the PHB3 PCBQs. You have the parent region in the chip. Then each device can create

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/06/2016 11:45 PM, Benjamin Herrenschmidt wrote: > On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: >>> Alternatively.. it might be simpler to just drop the SCOM as a >>> separate device. I think you could just hang the scom bus directly >>> off the chip object. IIUC the scom is

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/06/2016 11:49 PM, Benjamin Herrenschmidt wrote: > On Wed, 2016-09-07 at 07:47 +1000, Benjamin Herrenschmidt wrote: >> d be an extra op in the xscom device model I guess. >> >> No. If you split the XSCOM bus from the MMIO -> XSCOM bridge (the >> ADU) >> then the conversion only happens in

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/06/2016 11:47 PM, Benjamin Herrenschmidt wrote: > On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: >> >> The change does seem too invasive. I can give it a try in next >> version. >> >> When a memory region is triggered, the impacted device will have >> to convert the address with

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, 2016-09-07 at 15:46 +1000, David Gibson wrote: > Right, that's probably better.  Not immediately sure how the > scomdevice would get hold of its chip's scom AS, but we can probably > figure out something. Passed at instanciation ? Cheers, Ben.

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, Sep 07, 2016 at 03:27:46PM +1000, Benjamin Herrenschmidt wrote: > On Wed, 2016-09-07 at 11:59 +1000, David Gibson wrote: > > > > That does suggest an alternative approach though.  You could remove > > XScomDevice entirely from QOM existence, and just expose the xscom > > address space

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, 2016-09-07 at 11:59 +1000, David Gibson wrote: > > That does suggest an alternative approach though.  You could remove > XScomDevice entirely from QOM existence, and just expose the xscom > address space globally, much like address_space_memory.  The > individual devices could just

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, Sep 07, 2016 at 07:45:49AM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: > > > Alternatively.. it might be simpler to just drop the SCOM as a > > > separate device.  I think you could just hang the scom bus directly > > > off the chip

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Tue, Sep 06, 2016 at 04:42:01PM +0200, Cédric Le Goater wrote: > On 09/05/2016 05:39 AM, David Gibson wrote: > > On Wed, Aug 31, 2016 at 06:34:11PM +0200, Cédric Le Goater wrote: > >> From: Benjamin Herrenschmidt > >> > >> XSCOM is an interface to a sideband bus

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Tue, Sep 06, 2016 at 04:42:58PM +0200, Cédric Le Goater wrote: > On 09/06/2016 02:48 AM, David Gibson wrote: > > On Mon, Sep 05, 2016 at 05:11:53PM +1000, Benjamin Herrenschmidt wrote: > >> On Mon, 2016-09-05 at 13:39 +1000, David Gibson wrote: > +static XScomDevice

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, Sep 07, 2016 at 07:47:16AM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: > > > > The change does seem too invasive. I can give it a try in next > > version. > > > > When a memory region is triggered, the impacted device will have > > to

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, 2016-09-07 at 07:47 +1000, Benjamin Herrenschmidt wrote: > d be an extra op in the xscom device model I guess.  > > No. If you split the XSCOM bus from the MMIO -> XSCOM bridge (the > ADU) > then the conversion only happens in the former. You don't directly > route the MMIOs over ! You

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: > > Alternatively.. it might be simpler to just drop the SCOM as a > > separate device.  I think you could just hang the scom bus directly > > off the chip object.  IIUC the scom is basically the only chip- > level > > control mechanism,

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote: > > The change does seem too invasive. I can give it a try in next > version. > > When a memory region is triggered, the impacted device will have > to convert the address with xscom_to_pcb_addr(). There is some  > dependency on the chip

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/06/2016 02:48 AM, David Gibson wrote: > On Mon, Sep 05, 2016 at 05:11:53PM +1000, Benjamin Herrenschmidt wrote: >> On Mon, 2016-09-05 at 13:39 +1000, David Gibson wrote: +static XScomDevice *xscom_find_target(XScomState *s, uint32_t >>> pcb_addr, +

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On 09/05/2016 05:39 AM, David Gibson wrote: > On Wed, Aug 31, 2016 at 06:34:11PM +0200, Cédric Le Goater wrote: >> From: Benjamin Herrenschmidt >> >> XSCOM is an interface to a sideband bus provided by the POWER8 chip >> pervasive unit, which gives access to a number of

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Mon, Sep 05, 2016 at 05:11:53PM +1000, Benjamin Herrenschmidt wrote: > On Mon, 2016-09-05 at 13:39 +1000, David Gibson wrote: > > > +static XScomDevice *xscom_find_target(XScomState *s, uint32_t > > pcb_addr, > > > +  uint32_t *range) > > > +{ > > > +   

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Mon, 2016-09-05 at 13:39 +1000, David Gibson wrote: > > +static XScomDevice *xscom_find_target(XScomState *s, uint32_t > pcb_addr, > > +  uint32_t *range) > > +{ > > +    BusChild *bc; > > + > > +    QTAILQ_FOREACH(bc, >bus->bus.children, sibling) { > > + 

Re: [Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

On Wed, Aug 31, 2016 at 06:34:11PM +0200, Cédric Le Goater wrote: > From: Benjamin Herrenschmidt > > XSCOM is an interface to a sideband bus provided by the POWER8 chip > pervasive unit, which gives access to a number of facilities in the > chip that are needed by the

[Qemu-devel] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

From: Benjamin Herrenschmidt XSCOM is an interface to a sideband bus provided by the POWER8 chip pervasive unit, which gives access to a number of facilities in the chip that are needed by the OPAL firmware and to a lesser extent, Linux. This is among others how the PCI