Small correction
On 09/18/2018 03:27 PM, Singh, Brijesh wrote:>
> So far non of the guests were enabling the interrupt remap features
> even when it was available. As I explained in previous patches (see
> patch 6), Linux guest looks for a special IOAPIC device in IVHD before
> enabling the
On 09/17/2018 10:53 PM, Peter Xu wrote:
[...]
>> IMHO we should not be using error_report_once() here. It's possible that
>> guest OS have DTE[IV]=1 but has not programmed the interrupt
>> remapping entries or have deactivated the remapping. I see that Linux
>> OS does it all the time and in
On Mon, Sep 17, 2018 at 10:09:33AM -0500, Brijesh Singh wrote:
[...]
> > > +static int amdvi_int_remap_legacy(AMDVIState *iommu,
> > > + MSIMessage *origin,
> > > + MSIMessage *translated,
> > > +
On 09/17/2018 12:52 AM, Peter Xu wrote:
On Fri, Sep 14, 2018 at 01:27:00PM -0500, Brijesh Singh wrote:
Emulate the interrupt remapping support when guest virtual APIC is
not enabled.
For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
When VAPIC is not enabled, it uses interrupt
On Fri, Sep 14, 2018 at 01:27:00PM -0500, Brijesh Singh wrote:
> Emulate the interrupt remapping support when guest virtual APIC is
> not enabled.
>
> For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
>
> When VAPIC is not enabled, it uses interrupt remapping as defined in
> Table 20
Emulate the interrupt remapping support when guest virtual APIC is
not enabled.
For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
When VAPIC is not enabled, it uses interrupt remapping as defined in
Table 20 and Figure 15 from IOMMU spec.
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
