Re: [Qemu-devel] [PATCH v3 3/5] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

2017-07-31 Thread Alexander Bezzubikov
2017-07-31 14:29 GMT+03:00 Marcel Apfelbaum : > On 29/07/2017 2:37, Aleksandr Bezzubikov wrote: >> >> On PCI init PCI bridges may need some >> extra info about bus number to reserve, IO, memory and >> prefetchable memory limits. QEMU can provide this >> with a special

Re: [Qemu-devel] [PATCH v3 3/5] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

2017-07-31 Thread Marcel Apfelbaum
On 29/07/2017 2:37, Aleksandr Bezzubikov wrote: On PCI init PCI bridges may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with a special vendor-specific PCI capability. Signed-off-by: Aleksandr Bezzubikov

[Qemu-devel] [PATCH v3 3/5] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware

2017-07-28 Thread Aleksandr Bezzubikov
On PCI init PCI bridges may need some extra info about bus number to reserve, IO, memory and prefetchable memory limits. QEMU can provide this with a special vendor-specific PCI capability. Signed-off-by: Aleksandr Bezzubikov --- hw/pci/pci_bridge.c | 37