Re: [Qemu-devel] [PATCH v4] target/ppc: Fix carry flag setting for shift algebraic instructions

2017-10-06 Thread Richard Henderson
On 10/06/2017 01:40 AM, Sandipan Das wrote: > For POWER ISA v3.0, the XER bit CA32 needs to be set by the shift > right algebraic instructions whenever the CA bit is to be set. This > change affects the following instructions: > * Shift Right Algebraic Word (sraw[.]) > * Shift Right Algebraic

[Qemu-devel] [PATCH v4] target/ppc: Fix carry flag setting for shift algebraic instructions

2017-10-05 Thread Sandipan Das
For POWER ISA v3.0, the XER bit CA32 needs to be set by the shift right algebraic instructions whenever the CA bit is to be set. This change affects the following instructions: * Shift Right Algebraic Word (sraw[.]) * Shift Right Algebraic Word Immediate (srawi[.]) * Shift Right Algebraic