Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- target/arm/mte_helper.c | 56 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+)
diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index 6d0f82eb99..6657f57ca6 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -28,8 +28,64 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, uint64_t ptr, bool write, uintptr_t ra) { +#ifdef CONFIG_USER_ONLY /* Tag storage not implemented. */ return NULL; +#else + ARMCPU *cpu = arm_env_get_cpu(env); + CPUState *cs = CPU(cpu); + uintptr_t index; + int mmu_idx; + CPUTLBEntry *te; + CPUIOTLBEntry *iotlbentry; + MemoryRegionSection *section; + hwaddr physaddr, tag_physaddr; + + /* + * Find the TLB entry for this access. + * As a side effect, this also raises an exception for invalid access. + */ + mmu_idx = cpu_mmu_index(env, false); + index = tlb_index(env, mmu_idx, ptr); + te = tlb_entry(env, mmu_idx, ptr); + if (!tlb_hit(write ? tlb_addr_write(te) : te->addr_read, ptr)) { + /* ??? Expose VICTIM_TLB_HIT from accel/tcg/cputlb.c. */ + tlb_fill(cs, ptr, 16, write ? MMU_DATA_STORE : MMU_DATA_LOAD, + mmu_idx, ra); + index = tlb_index(env, mmu_idx, ptr); + te = tlb_entry(env, mmu_idx, ptr); + } + + /* If the virtual page MemAttr != Tagged, nothing to do. */ + iotlbentry = &env->iotlb[mmu_idx][index]; + if (!iotlbentry->attrs.target_tlb_bit1) { + return NULL; + } + + /* If the board did not allocate tag memory, nothing to do. */ + if (!cpu_get_address_space(cs, ARMASIdx_TAG)) { + return NULL; + } + + /* Find the physical address for the virtual access. */ + section = iotlb_to_section(cs, iotlbentry->addr, iotlbentry->attrs); + physaddr = ((iotlbentry->addr & TARGET_PAGE_MASK) + ptr + + section->offset_within_address_space + - section->offset_within_region); + tag_physaddr = physaddr >> (LOG2_TAG_GRANULE + 1); + + /* Find the memory backing the tag address in tag address space. */ + mmu_idx = arm_to_core_mmu_idx(ARMMMUIdx_TagNS); + te = tlb_entry(env, mmu_idx, tag_physaddr); + if (!tlb_hit(write ? tlb_addr_write(te) : te->addr_read, tag_physaddr)) { + /* ??? Expose VICTIM_TLB_HIT from accel/tcg/cputlb.c. */ + tlb_fill(cs, tag_physaddr, 1, write ? MMU_DATA_STORE : MMU_DATA_LOAD, + mmu_idx, ra); + te = tlb_entry(env, mmu_idx, tag_physaddr); + } + + return (void *)(tag_physaddr + te->addend); +#endif } static int get_allocation_tag(CPUARMState *env, uint64_t ptr, uintptr_t ra) -- 2.17.2