Re: [Qemu-devel] [PATCH v5 19/30] riscv: sifive: Implement PRCI model for FU540

2019-08-23 Thread Alistair Francis
On Thu, Aug 22, 2019 at 10:21 PM Bin Meng wrote: > > This adds a simple PRCI model for FU540 (sifive_u). It has different > register layout from the existing PRCI model for FE310 (sifive_e). > > Signed-off-by: Bin Meng > > --- > > Changes in v5: > - change to use defines instead of enums > -

[Qemu-devel] [PATCH v5 19/30] riscv: sifive: Implement PRCI model for FU540

2019-08-22 Thread Bin Meng
This adds a simple PRCI model for FU540 (sifive_u). It has different register layout from the existing PRCI model for FE310 (sifive_e). Signed-off-by: Bin Meng --- Changes in v5: - change to use defines instead of enums - change to use qemu_log_mask(LOG_GUEST_ERROR,...) in sifive_u_prci -