On 18/04/12 21:31, Jakub Jermar wrote:
Does HelenOS break without the patch? It worked fine for me.
Hi Alex,
I've just tested QEMU git (which includes the TLB invalidation fix) and
it seems to work with HelenOS mainline quite nice. Not sure if we can
conclude the other fix is not needed
On 04/13/2012 06:53 PM, Mark Cave-Ayland wrote:
On 11/04/12 02:08, David Gibson wrote:
Hi David,
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new
method of
calculating the MSR for the interrupt context. However this doesn't
quite
agree with the PowerISA 2.06B specification
On 04/18/2012 05:30 PM, Alexander Graf wrote:
On 04/13/2012 06:53 PM, Mark Cave-Ayland wrote:
On 11/04/12 02:08, David Gibson wrote:
Hi David,
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new
method of
calculating the MSR for the interrupt context. However this doesn't
On 04/18/2012 05:30 PM, Alexander Graf wrote:
On 04/13/2012 06:53 PM, Mark Cave-Ayland wrote:
On 11/04/12 02:08, David Gibson wrote:
Hi David,
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new
method of
calculating the MSR for the interrupt context. However this doesn't
On 18.04.2012, at 22:31, Jakub Jermar wrote:
On 04/18/2012 05:30 PM, Alexander Graf wrote:
On 04/13/2012 06:53 PM, Mark Cave-Ayland wrote:
On 11/04/12 02:08, David Gibson wrote:
Hi David,
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new
method of
calculating the MSR
On 11/04/12 02:08, David Gibson wrote:
Hi David,
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new method of
calculating the MSR for the interrupt context. However this doesn't quite
agree with the PowerISA 2.06B specification (pp. 811-814) since too many
bits were being
On Fri, Apr 06, 2012 at 08:06:27PM +0100, Mark Cave-Ayland wrote:
Commit 41557447d30eeb944e42069513df13585f5e6c7f introduced a new method of
calculating the MSR for the interrupt context. However this doesn't quite
agree with the PowerISA 2.06B specification (pp. 811-814) since too many
bits
