Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

2016-06-01 Thread Mark Cave-Ayland
On 02/06/16 04:15, David Gibson wrote: > On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote: >> On 31/05/16 01:41, David Gibson wrote: >> >>> From: Benjamin Herrenschmidt >>> >>> We rework the way the MMU indices are calculated, providing separate >>>

Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

2016-06-01 Thread David Gibson
On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote: > On 31/05/16 01:41, David Gibson wrote: > > > From: Benjamin Herrenschmidt > > > > We rework the way the MMU indices are calculated, providing separate > > indices for I and D side based on MSR:IR and

Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

2016-06-01 Thread Mark Cave-Ayland
On 31/05/16 01:41, David Gibson wrote: > From: Benjamin Herrenschmidt > > We rework the way the MMU indices are calculated, providing separate > indices for I and D side based on MSR:IR and MSR:DR respectively, > and thus no longer need to flush the TLB on context