Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/24/2018 07:20 PM, Laszlo Ersek wrote: > On 05/24/18 16:14, Ard Biesheuvel wrote: >> On 24 May 2018 at 15:59, Laszlo Ersek wrote: >>> On 05/24/18 15:07, Peter Maydell wrote: On 24 May 2018 at 13:59, Laszlo Ersek wrote: > On 05/24/18 11:11,

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/24/18 16:14, Ard Biesheuvel wrote: > On 24 May 2018 at 15:59, Laszlo Ersek wrote: >> On 05/24/18 15:07, Peter Maydell wrote: >>> On 24 May 2018 at 13:59, Laszlo Ersek wrote: On 05/24/18 11:11, Peter Maydell wrote: > Won't it also break a guest

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/24/18 16:09, Auger Eric wrote: > Hi Laszlo, > > On 05/24/2018 03:59 PM, Laszlo Ersek wrote: >> On 05/24/18 15:07, Peter Maydell wrote: >>> On 24 May 2018 at 13:59, Laszlo Ersek wrote: On 05/24/18 11:11, Peter Maydell wrote: > Won't it also break a guest which is

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 24 May 2018 at 15:59, Laszlo Ersek wrote: > On 05/24/18 15:07, Peter Maydell wrote: >> On 24 May 2018 at 13:59, Laszlo Ersek wrote: >>> On 05/24/18 11:11, Peter Maydell wrote: Won't it also break a guest which is just Linux loaded not via

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Hi Laszlo, On 05/24/2018 03:59 PM, Laszlo Ersek wrote: > On 05/24/18 15:07, Peter Maydell wrote: >> On 24 May 2018 at 13:59, Laszlo Ersek wrote: >>> On 05/24/18 11:11, Peter Maydell wrote: Won't it also break a guest which is just Linux loaded not via firmware which

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/24/18 15:07, Peter Maydell wrote: > On 24 May 2018 at 13:59, Laszlo Ersek wrote: >> On 05/24/18 11:11, Peter Maydell wrote: >>> Won't it also break a guest which is just Linux loaded not via >>> firmware which is an aarch32 kernel without LPAE support? >> >> Does such a

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Hi Peter, Laszlo, On 05/24/2018 03:07 PM, Peter Maydell wrote: > On 24 May 2018 at 13:59, Laszlo Ersek wrote: >> On 05/24/18 11:11, Peter Maydell wrote: >>> Won't it also break a guest which is just Linux loaded not via >>> firmware which is an aarch32 kernel without LPAE

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 24 May 2018 at 13:59, Laszlo Ersek wrote: > On 05/24/18 11:11, Peter Maydell wrote: >> Won't it also break a guest which is just Linux loaded not via >> firmware which is an aarch32 kernel without LPAE support? > > Does such a thing exist? (I honestly have no clue.) Yes, it

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/24/18 11:11, Peter Maydell wrote: > On 23 May 2018 at 21:52, Laszlo Ersek wrote: >> On 05/23/18 22:40, Auger Eric wrote: >>> On 05/23/2018 07:45 PM, Laszlo Ersek wrote: >> Regarding the second patch, I do believe we need "more sophistication" there. For example,

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 23 May 2018 at 21:52, Laszlo Ersek wrote: > On 05/23/18 22:40, Auger Eric wrote: >> On 05/23/2018 07:45 PM, Laszlo Ersek wrote: > >>> Regarding the second patch, I do believe we need "more sophistication" >>> there. For example, I guess it could be possible to distinguish

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Hi, On 05/23/2018 10:52 PM, Laszlo Ersek wrote: > On 05/23/18 22:40, Auger Eric wrote: >> On 05/23/2018 07:45 PM, Laszlo Ersek wrote: > >>> Regarding the second patch, I do believe we need "more sophistication" >>> there. For example, I guess it could be possible to distinguish "-cpu >>>

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

On 05/23/18 22:40, Auger Eric wrote: > On 05/23/2018 07:45 PM, Laszlo Ersek wrote: >> Regarding the second patch, I do believe we need "more sophistication" >> there. For example, I guess it could be possible to distinguish "-cpu >> cortex-a15" from "-cpu cortex-a57" somehow, and stick with the

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Hi Laszlo, On 05/23/2018 07:45 PM, Laszlo Ersek wrote: > Hi Eric, > > On 05/23/18 18:03, Eric Auger wrote: >> Current Machvirt PCI host controller's ECAM region is 16MB large. >> This limits the number of PCIe buses to 16. >> >> PC/Q35 machines have a 256MB region allowing up to 256 buses. >>

Re: [Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Hi Eric, On 05/23/18 18:03, Eric Auger wrote: > Current Machvirt PCI host controller's ECAM region is 16MB large. > This limits the number of PCIe buses to 16. > > PC/Q35 machines have a 256MB region allowing up to 256 buses. > This series tries to bridge the gap. > > It declares a new ECAM

[Qemu-devel] [RFC 0/2] ARM virt: Support up to 256 PCIe buses

Current Machvirt PCI host controller's ECAM region is 16MB large. This limits the number of PCIe buses to 16. PC/Q35 machines have a 256MB region allowing up to 256 buses. This series tries to bridge the gap. It declares a new ECAM region located beyond 256GB, of size 256MB (just after the