Re: [Qemu-devel] [RFC PATCH 0/4] FTGMAC100 model for the Aspeed SoCs

2016-12-16 Thread Cédric Le Goater
On 12/16/2016 05:48 PM, Peter Maydell wrote: > On 29 November 2016 at 17:41, Cédric Le Goater wrote: >> The Aspeed SoCs AST2400 and AST2500 have two FTGMAC100 ethernet >> controllers. This serie proposes a model for this device and a way to >> customize the bit definitions which

Re: [Qemu-devel] [RFC PATCH 0/4] FTGMAC100 model for the Aspeed SoCs

2016-12-16 Thread Peter Maydell
On 29 November 2016 at 17:41, Cédric Le Goater wrote: > The Aspeed SoCs AST2400 and AST2500 have two FTGMAC100 ethernet > controllers. This serie proposes a model for this device and a way to > customize the bit definitions which are slightly different from the > Faraday

[Qemu-devel] [RFC PATCH 0/4] FTGMAC100 model for the Aspeed SoCs

2016-11-29 Thread Cédric Le Goater
Hi, The Aspeed SoCs AST2400 and AST2500 have two FTGMAC100 ethernet controllers. This serie proposes a model for this device and a way to customize the bit definitions which are slightly different from the Faraday definitions. The last patch adds a fake NC-SI (Network Controller Sideband