On Fri, 16 Aug 2019 13:59:02 +0100
Peter Maydell wrote:
> On Tue, 25 Jun 2019 at 12:28, Jonathan Cameron
> wrote:
> >
> > CCIX topologies are 'layered' on top of PCIe tree topologies.
> > This is done primarily by allowing a single CCIX device to appear as
> > multiple disjoint nodes in the
On Tue, 25 Jun 2019 at 12:28, Jonathan Cameron
wrote:
>
> CCIX topologies are 'layered' on top of PCIe tree topologies.
> This is done primarily by allowing a single CCIX device to appear as
> multiple disjoint nodes in the PCIe tree.
> This patch is being distributed by the CCIX Consortium,
For reference alongside this patch set.
Evaluation version of the CCIX 1.0a base specification now available,
(though there is a form to complete and license agreement)..
https://www.ccixconsortium.com/ccix-library/download-form/
Thanks,
Jonathan
On Tue, 25 Jun 2019 19:27:45 +0800
Jonathan
CCIX topologies are 'layered' on top of PCIe tree topologies.
This is done primarily by allowing a single CCIX device to appear as
multiple disjoint nodes in the PCIe tree.
This layering is described via extensive PCIe DVSEC extended
capabilities in PCIe config space across all the functions that
